1. Field of the Invention
The present invention relates to an electronic device with uniform-resistance fan-out blocks, and more particularly, to a thin film transistor liquid crystal display (TFT-LCD) panel with uniform-resistance fan-out blocks.
2. Description of the Prior Art
FIG. 1 shows a substrate 1 of a typical active matrix thin film transistor LCD panel, which generally includes an active area 10. The active area 10 includes data lines 12 and gate lines 14 which collectively carry signals to control transistor switches (not shown in FIG. 1) so as to drive pixels constructing an image on the display panel. Alternately, data lines 12 and gate lines 14 will be referred to as control lines in this specification. The portion surrounding the active area 10 is the out-lead bonding (OLB) area 16 which contains some bonding areas 20. Each bonding area 20 includes multiple bonding pads to be coupled with external driving integrating circuits (ICs) or drivers. Moreover, there are many fan-out blocks 15 formed between control lines (12, 14) and the bonding area 20 in the OLB area 16. Each fan-out block 15 includes multiple interconnecting leads, and each interconnecting lead is electrically connected to a control line (12, 14) at one end and connected to a bonding pad in the bonding pad area 20 at the other end for further connecting to external driving ICs.
Usually the pitch between adjacent interconnecting leads at the external driving IC side is far less than that at control line (12, 14) side in a typical fan-out block, and therefore the interconnecting leads of a fan-out block tend to have different lengths. Without special routing, for example, the outmost interconnecting lead will be far longer than the one in the medial portion of a fan-out block. Since the resistance of an interconnecting lead is proportional to its length, interconnecting leads of a fan-out block are prone to have different resistances. Such difference of resistances may impact the time delay and quality of control signals from external driving ICs and may thus downgrade the entire image quality. To resolve such problem, many works have been done for providing interconnecting leads with uniform resistance in a single fan-out block, such as the techniques disclosed in U.S. Pat. Nos. 6,104,465, 5,757,450, 6,683,669 and 6,842,200. Generally, these techniques can improve and achieve uniform resistance, i.e., make the resistance between adjacent interconnecting leads in a fan-out block substantially identical.
Although uniform resistance in a single fan-out block can be achieved by the techniques mentioned in above patents, the inventors of the present invention found that the resistances of interconnecting leads among fan-out blocks in the OLB area 16 may have non-negligible differences. Especially when the difference in resistance between the adjacent outmost interconnecting leads of two adjacent fan-out blocks is too large (more than 10Ω, for example), the resulted image quality is liable to be degraded. FIG. 2 shows adjacent bonding areas (20a, 20b) and the corresponding fan-out blocks (A, B). The adjacent region 5 of the two adjacent fan-out blocks (A, B) is highlighted and indicated by a circle. Driving ICs coupled to bonding area 20a and 20b may be either ICs of different specification or partially connected with some floating pins. In such cases, it is possible that the difference in resistance between adjacent outmost interconnecting leads of the two adjacent fan-out blocks (A, B) is too large to be neglected. In view of foregoing, there is a need to provide an improved fan-out block structure and method to resolve the problem associated with non-uniformity in resistance between adjacent fan-out blocks.